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Preliminary Technical Data
FEATURES
Extremely low harmonic distortion -108 dBc HD2 @ 10 MHz -79 dBc HD2 @ 70 MHz -125 dBc HD3 @ 10 MHz -87 dBc HD3 @ 70 MHz Low input voltage noise: 2.2 nV/Hz High speed -3 dB bandwidth of 1.5 GHz, G = 1 Slew rate: 4700 V/s 0.1 dB gain flatness to 125 MHz Fast settling to 0.01% in 8.5 ns Fast overdrive recovery of 4 ns 1 mV typical offset voltage Externally adjustable gain Differential to differential or single-ended to differential operation Adjustable output common-mode voltage Wide Supply Voltage Range: +5 V & 5 V Pb-free 3 mm x 3 mm LFCSP package
Ultra-Low Distortion Differential ADC Driver ADA4938-1
FUNCTIONAL BLOCK DIAGRAM
Figure 1.
APPLICATIONS
ADC drivers Single-ended-to-differential converters IF and baseband gain blocks Differential buffers Line drivers
GENERAL DESCRIPTION
The ADA4938-1 is a low noise, ultra-low distortion, high speed differential amplifier. It is an ideal choice for driving high performance ADCs with resolutions up to 16 bits from dc to 70 MHz. The output common mode voltage is adjustable over a wide range, allowing the ADA4938-1 to match the input of the ADC. The internal common mode feedback loop also provides exceptional output balance as well as suppression of even-order harmonic distortion products. Full differential and single-ended to differential gain configurations are easily realized with the ADA4938-1. A simple external feedback network of four resistors determines the amplifier's closed-loop gain. The ADA4938-1 is fabricated using ADI's proprietary third generation high-voltage XFCB process, enabling it to achieve very low levels of distortion with input voltage noise of only 2.2 nV/Hz. The low dc offset and excellent dynamic performance of the ADA4938-1 make it well suited for a wide variety of data acquisition and signal processing and applications. The ADA4938-1 is available in a Pb-free, 3 mm x 3mm lead frame chip scale package (LFCSP). It is specified to operate over the extended industrial temperature range of -40C to +85C.
Rev. PrA
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2006 Analog Devices, Inc. All rights reserved.
ADA4938-1 TABLE OF CONTENTS
Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Dual Supply Operation ................................................................ 3
Preliminary Technical Data
Single Supply Operation...............................................................5 Absolute Maximum Ratings ............................................................7 Thermal Resistance .......................................................................7 ESD Caution...................................................................................7 Pin Configuration and Function Descriptions..............................8 Outline Dimensions ..........................................................................9 Ordering Guide .............................................................................9
REVISION HISTORY
12/06--Revision PrA: Initial Version
Rev. PrA | Page 2 of 9
Preliminary Technical Data SPECIFICATIONS
DUAL SUPPLY OPERATION
ADA4938-1
At 25 C, +VS = 5 V, -VS = -5 V, VOCM = 0 V, RG = RF = 200 , G = +1, RL, dm = 1 k, unless otherwise noted. All specifications refer to single-ended input and differential outputs, unless otherwise noted. Table 1.
Parameter DIN TO OUT PERFORMANCE DYNAMIC PERFORMANCE -3 dB Small Signal Bandwidth Bandwidth for 0.1 dB Flatness Large Signal Bandwidth Slew Rate Settling Time Overdrive Recovery Time NOISE/HARMONIC PERFORMANCE 1 Second Harmonic Third Harmonic IMD IP3 Voltage Noise (RTI) Noise Figure Input Current Noise INPUT CHARACTERISTICS Offset Voltage Input Bias Current Input Resistance Input Capacitance Input Common-Mode Voltage CMRR OUTPUT CHARACTERISTICS Output Voltage Swing Output Current Output Balance Error VOCM to OUT PERFORMANCE VOCM DYNAMIC PERFORMANCE -3 dB Bandwidth Slew Rate INPUT VOLTAGE NOISE (RTI) VOCM INPUT CHARACTERISTICS Input Voltage Range Input Resistance Input Offset Voltage Input Bias Current VOCM CMRR Gain POWER SUPPLY TMIN to TMAX variation Differential Common mode Conditions Min Typ Max Unit
VOUT = 0.5 V p-p, Differential Input VOUT = 2 V p-p, Differential Input VOUT = 2 V p-p, Differential Input VOUT = 4 V p-p, Differential Input VOUT = 2 V p-p 0.01%, VOUT = 2 Vp-p VIN = 5 V to 0 V step, G = +2 VOUT = 2 V p-p, 10 MHz VOUT = 2 V p-p, 70 MHz VOUT = 2 V p-p, 10 MHz VOUT = 2 V p-p, 70 MHz 70 MHz 70 MHz G = +2
1500 125 1300 800 4700 8.5 4 -108 -79 -125 -87
MHz MHz MHz MHz V/s ns ns dBc dBc dBc dBc dBc dBm nV/Hz dB pA/Hz mV V/C A A/C M M pF V dB 4 V mA dB
2.2 12 2 1 4 3.5 -0.01 6 3 1 -4.7 to 3.4 -77 1 95 -66
VOS, dm = VOUT, dm/2; VDIN+ = VDIN- = 0 V TMIN to TMAX variation
VOUT, dm/VIN, cm; VIN, cm = 1 V Maximum VOUT; single-ended output VOUT, cm/VOUT, dm; VOUT, dm = 1 V; 10 MHz
400 1700 7.5 -3.8 VOS, cm = VOUT, cm; VDIN+ = VDIN- = 0 V VOUT, dm/VOCM; VOCM = 1 V VOUT, cm/VOCM; VOCM = 1 V
Rev. PrA | Page 3 of 9
MHz V/s nV/Hz 3.8 V k mV A dB V/V
200 1 0.5 -75 1
3.5
ADA4938-1
Parameter Operating Range Quiescent Current Conditions
Preliminary Technical Data
Min 4.5 Typ 40 40 <1 -90 1 2 1 200 40 200 -40 +85 Max 12 Unit V mA A/C mA dB V V s ns A A C
Power Supply Rejection Ratio POWER DOWN (PD) PD Input Voltage Turn-Off Time Turn-On Time PD Bias Current Enabled Disabled OPERATING TEMPERATURE RANGE
TMIN to TMAX variation Powered down VOUT, dm/VS; VS = 1 V Powered down Enabled
PD = 5 V PD = 0 V
Rev. PrA | Page 4 of 9
Preliminary Technical Data
SINGLE SUPPLY OPERATION
ADA4938-1
At 25 C, +VS = 5 V, -VS = 0 V, VOCM = 2.5 V, RG = RF = 200 , G = +1, RL, dm = 1 k, unless otherwise noted. All specifications refer to single-ended input and differential output, unless otherwise noted. Table 2.
Parameter DIN TO OUT PERFORMANCE DYNAMIC PERFORMANCE -3 dB Small Signal Bandwidth Bandwidth for 0.1 dB Flatness Large Signal Bandwidth Slew Rate Settling Time Overdrive Recovery Time NOISE/HARMONIC PERFORMANCE Second Harmonic Third Harmonic IMD IP3 Voltage Noise (RTI) Noise Figure Input Current Noise INPUT CHARACTERISTICS Offset Voltage Input Bias Current Input Resistance Input Capacitance Input Common-Mode Voltage CMRR OUTPUT CHARACTERISTICS Output Voltage Swing Output Current Output Balance Error VOCM TO OUT PERFORMANCE VOCM DYNAMIC PERFORMANCE -3 dB Bandwidth Slew Rate INPUT VOLTAGE NOISE (RTI) VOCM INPUT CHARACTERISTICS Input Voltage Range Input Resistance Input Offset Voltage Input Bias Current VOCM CMRR Gain POWER SUPPLY Operating Range Quiescent Current TMIN to TMAX variation Differential Common mode Conditions Min Typ Max Unit
VOUT = 0.5 V p-p, Differential Input VOUT = 2 V p-p, Differential Input VOUT = 2 V p-p, Differential Input VOUT = 2 V p-p 0.01%, VOUT = 2 V p-p VIN = 2.5 V to 0 V step, G = +2 VOUT = 2 V p-p, 10 MHz VOUT = 2 V p-p, 70 MHz VOUT = 2 V p-p, 10 MHz VOUT = 2 V p-p, 70 MHz 70 MHz 70 MHz G = +2
1500 125 1100 3900 8.1 4 -115 -87 -110 -79
MHz MHz MHz V/s ns ns dBc dBc dBc dBc dBc dBm nV/Hz dB pA/Hz mV V/C A A/C M M pF V dB 3.9 V mA dB
2.2 12 2 1 4 3.5 -0.01 6 3 1 0.3 to 3.4 -77 1.1 95 -66
VOS, dm = VOUT, dm/2; VDIN+ = VDIN- = VOCM = 2.5 V TMIN to TMAX variation
VOUT, dm/VIN, cm; VIN, cm = 1 V Maximum VOUT; single-ended output VOUT, cm/VOUT, dm; VOUT, dm = 1 V
V = 0.5 V
400 1700
MHz V/s nV/Hz 3.8 V k mV A dB V/V V mA A/C
1.2 VOS, cm = VOUT, cm; VDIN+ = VDIN- = VOCM = 2.5 V VOUT, dm/VOCM; VOCM = 1 V VOUT, cm/VOCM; VOCM = 1 V 4.5 TMIN to TMAX variation
Rev. PrA | Page 5 of 9
200 1 0.5 -75 1 12 36 40
ADA4938-1
Parameter Power Supply Rejection Ratio POWER DOWN (PD) PD Input Voltage Turn-Off Time Turn-On Time PD Bias Current Enabled Disabled OPERATING TEMPERATURE RANGE Conditions Powered down VOUT, dm/VS; VS = 1 V Powered down Enabled
Preliminary Technical Data
Min Typ <1 -90 1 2 1 200 20 -120 -40 +85 Max Unit mA dB V V s ns A A C
PD = 5 V PD = 0 V
Rev. PrA | Page 6 of 9
Preliminary Technical Data ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Supply Voltage Power Dissipation Storage Temperature Range Operating Temperature Range Lead Temperature (Soldering, 10 sec) Junction Temperature Rating TBD See Figure 2 -65C to +125C -40C to +85C 300C 150C
ADA4938-1
The power dissipated in the package (PD) is the sum of the quiescent power dissipation and the power dissipated in the package due to the load drive. The quiescent power is the voltage between the supply pins (VS) times the quiescent current (IS). The power dissipated due to the load drive depends upon the particular application. The power due to load drive is calculated by multiplying the load current by the associated voltage drop across the device. RMS voltages and currents must be used in these calculations. Airflow increases heat dissipation, effectively reducing JA. In addition, more metal directly in contact with the package leads/exposed pad from metal traces, through-holes, ground, and power planes reduces the JA. Figure 2 shows the maximum safe power dissipation in the package vs. the ambient temperature for the 16-lead LFCSP (TBD C/W) on a JEDEC standard 4-layer board.
Stresses above those listed under Absolute Maximum Rating may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
THERMAL RESISTANCE
JA is specified for the worst-case conditions; that is, JA is specified for a device (including exposed pad) soldered to the circuit board. Table 4. Thermal Resistance
Package Type 16-Lead LFCSP (Exposed Pad) JA TBD Unit C/W
Maximum Power Dissipation
The maximum safe power dissipation in the ADA4938-1 package is limited by the associated rise in junction temperature (TJ) on the die. At approximately 150C, which is the glass transition temperature, the plastic changes its properties. Even temporarily exceeding this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric performance of the ADA4938-1. Exceeding a junction temperature of 150C for an extended period can result in changes in the silicon devices, potentially causing failure.
Figure 2. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
ESD CAUTION
Rev. PrA | Page 7 of 9
ADA4938-1 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Preliminary Technical Data
FB-OUT 1 +IN 2 -IN 3 FB+OUT 4
PIN 1 INDICATOR
12 PD 11 -OUT 10 +OUT 9 VOCM
TOP VIEW
Figure 3. Pin Configuration
Table 5. Pin Function Descriptions
Pin No. 1 2 3 4 5 to 8 9 10 11 12 13 to 16 Mnemonic FBB-OUT +IN -IN FBB+OUT +VS VOCM +OUT -OUT PD -VS Description Negative output feedback pin Positive input summing node Negative input summing node Positive output feedback pin Positive supply voltage Output common mode voltage Positive output Negative output Power-down pin Negative supply voltage
Rev. PrA | Page 8 of 9
Preliminary Technical Data OUTLINE DIMENSIONS
0.50 0.40 0.30
ADA4938-1
3.00 BSC SQ 0.45 PIN 1 INDICATOR TOP VIEW 2.75 BSC SQ 0.50 BSC 12 MAX 0.90 0.85 0.80 SEATING PLANE 0.30 0.23 0.18 0.80 MAX 0.65 TYP 0.05 MAX 0.02 NOM 0.20 REF
0.60 MAX
PIN 1 INDICATOR
*1.65 1.50 SQ 1.35
13 12
16
1
EXPOSED PAD
9 (BOTTOM VIEW) 4 8 5
0.25 MIN
1.50 REF
*COMPLIANT TO JEDEC STANDARDS MO-220-VEED-2 EXCEPT FOR EXPOSED PAD DIMENSION.
Figure 4. 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 3 mm x 3 mm Body (CP-16-3) Dimensions shown in millimeters
ORDERING GUIDE
Model ADA4938-1YCPZ-R2 ADA4938-1YCPZ-RL ADA4938-1YCPZ-R7 Ordering Quantity 5,000 1,500 250 Temperature Range -40C to +85C -40C to +85C -40C to +85C Package Description 16-Lead 3 mm x 3 mm LFCSP 16-Lead 3 mm x 3 mm LFCSP 16-Lead 3 mm x 3 mm LFCSP Package Option CP-16 -3 CP-16 -3 CP-16 -3 Branding
(c)2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. PR06592-0-12/06(PrA)
T T
Rev. PrA | Page 9 of 9

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